In a data transmission system, when a large jitter arises in a transmission signal, the signal cannot be correctly transmitted.
Therefore, it is necessary to measure the jitter which this type of data transmission system and the equipment constituting the system generate.
That is, in a digital transmission path for transmitting digital signals, the transmission path is extended by repeaters which reproduce and output digital signals. However, in using such repeaters, when phase fluctuation (jitter) in the input signal becomes large, the original signal cannot be reproduced.
Therefore, with respect to the maximum permissible level of jitter in an interface of a digital transmission path, the limit is prescribed in various international standards.
For example, with respect to the synchronous digital transmission network called Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH), the maximum permissible level of jitter is prescribed in the following non-Patent document 1.
Non-Patent document 1: ITU-T Recommendations G. 825 (March 2000). Therefore, in order to verify whether or not the jitter generated in the interface of this type of transmission path satisfies the above-described maximum permissible level, it is necessary to measure the jitter amount in advance.
As a conventional jitter measuring apparatus used for such an object, for example, as described in the following Patent document 1, an analog system jitter measuring apparatus in which, due to the phase of a signal to be measured (clock signal) being synchronized by using a phase-locked loop (PLL) circuit, a signal corresponding to the phase shift is detected as jitter has been known.
Patent document 1: Jpn. Pat. Appln. KOKAI Publication No. 2001-133492. In such an analog system jitter measuring apparatus, there is the problem that dispersion is brought about in a measured result of a jitter due to dispersion in the characteristics of parts used for the PLL circuit, and the reproducibility of a measured result of a jitter deteriorates due to environmental variation in temperature and the like.
Further, in an analog system jitter measuring apparatus as described above, there is the problem that a measurement range of jitter is limited by a linear operation range of a phase detector (PD) and a voltage controlled oscillator (VCO) which configuration the PLL circuit.
Therefore, in an analog system jitter measuring apparatus as described above, because the measurement resolution deteriorates when a sensitivity of a PD or a VCO is reduced in order to broaden the measurement range of jitter, there is a problem in the point that a high resolution and a broad measurement range cannot be compatible.
As a technology to solve these problems, a digital system jitter measuring apparatus and measuring method which carry out a detection of a phase error by arithmetic processing are proposed in the following Patent document 2.
Patent document 2: U.S. Pat. No. 6,621,860. FIG. 5 shows a configuration of a digital system jitter measuring apparatus 10 based on Patent document 2.
In this jitter measuring apparatus 10, by sampling a signal to be measured C by an analog-to-digital converter 11, the signal to be measured C is converted into a digital signal sequence x(n), and this digital signal sequence x(n) is input to an orthogonal signal generating unit 12.
Here, provided that a frequency of a signal to be measured is fc, an amplitude is Ac, a sampling frequency of analog-to-digital conversion is fs, and an initial phase is θc, and a jitter is φ (n), the signal sequence x(n) can be expressed as follows.x(n)=Ac·cos [2π(fc/fs)n+θc+φ(n)]  (1)
Where, (n=0,1,2, . . . )
The orthogonal signal generating unit 12 includes a Hilbert transformer, and transforms the signal sequence x(n) of the signal to be measured C into two signals I(n), Q(n) whose phases are orthogonal to one another, and outputs these two orthogonal signals I(n), Q(n) to an instantaneous phase calculating unit 13.
Here, the two orthogonal signals I(n), Q(n) are expressed as follows with respect to the above-described signal sequence x(n).I(n)=x(n)=Ac·cos [2π(fc/fs)n+θc+φ(n)]Q(n)=Ac·sin [2π(fc/fs)n+θc+φ(n)]  (2)
The instantaneous phase calculating unit 13 calculates an instantaneous phase Θ(n) determined by the two orthogonal signals I(n), Q(n) output from the orthogonal signal generating unit 12, by the following operation, and outputs this instantaneous phase Θ(n) to a discontinuity correcting unit 14.Θ(n)=tan−1 [Q(n)/I(n)]  (3)
Here, when the two orthogonal signals are expressed by the above formula (2), the instantaneous phase Θ(n) is expressed as follows.
                                                                        Θ                ⁡                                  (                  n                  )                                            =                                                tan                                      -                    1                                                  ⁡                                  [                                                            Q                      ⁡                                              (                        n                        )                                                              /                                          I                      ⁡                                              (                        n                        )                                                                              ]                                                                                                                        =                                                      2                    ⁢                                          π                      ⁡                                              (                                                  fc                          /                          fs                                                )                                                              ⁢                    n                                    +                                      θ                    ⁢                                                                                  ⁢                    c                                    +                                      ϕ                    ⁡                                          (                      n                      )                                                                                  ]                                                          (        4        )            
Here, the instantaneous phase Θ(n) determined by the operation of tan−1 [Q(n)/I(n)] is limited to a range from −π to π, and for an increase in n, as shown in FIG. 6A, a variation is repeated in which after the instantaneous phase Θ(n) increases from a value close to an initial phase θc up to nearly π while receiving a fluctuation by the jitter, the instantaneous phase Θ(n) varies to nearly −π discontinuously, and increases up to nearly π again.
As described in FIG. 6B, the discontinuity correcting unit 14 corrects the instantaneous phase Θ(n) which is output from the instantaneous phase calculating unit 13, and which varies discontinuously as described above into an instantaneous phase Θ(n) having continuity, and outputs the corrected instantaneous phase Θ(n) to a linear phase eliminating unit 15.
The linear phase eliminating unit 15 presumes a phase component 2π(fc/fs)n linearly increasing with respect to an increase in n and an initial phase θc in the corrected instantaneous phases θ(n) output from the discontinuity correcting unit 14, and determines a jitter component φ(n) as shown in FIG. 6C by subtracting the sum of those as a linear phase component L(n) from the instantaneous phases θ(n), and outputs this jitter component φ(n) to a jitter amount detecting unit 16.
The jitter amount detecting unit 16 detects a jitter amount of the signal to be measured C based on the jitter component φ(n) output from the linear phase eliminating unit 15.
This jitter amount is a maximum amplitude (p-p value) or a root-mean-square value (rms) of the jitter component φ(n), or an amplitude probability distribution (histogram), a spectrum value obtained by an FFT operation, or the like, and may be one of or a combination of those.
In this way, by means of a digital system jitter measuring apparatus which measures a jitter in a signal to be measured by numeric arithmetic processing, as compared with an analog system jitter measuring apparatus described above, there is no reduction in an measuring accuracy of jitter due to dispersion in the characteristics of parts or an environmental variation, and it is possible to measure a jitter with high reproducibility, and a broad measurement range and a high measurement resolution can be compatible by making a number of arithmetic bits large.
However, in a technique, as the digital system jitter measuring apparatus 10 described above, in which a jitter component φ(n) is determined by subtracting a linear phase component L(n) from an instantaneous phase θ(n), because the instantaneous phase θ(n) and the linear phase component L(n) which are signal components diverging as time passes are handled with, there is the problem that a maximum measurement time for jitter measurement is limited.
That is, this is because the instantaneous phase θ(n) having continuity and the linear phase component L(n) described above increase and diverge as a measurement time passes.
Accordingly, in the digital system jitter measuring apparatus 10 described above, because a maximum measurement time for jitter measurement is limited, there is a problem in the point that jitter measurement for a long time over the maximum measurement time cannot be carried out.
Specifically, the maximum measurement time for jitter measurement is limited according to a number of bits at the time of operating the instantaneous phase θ(n) which the discontinuity correcting unit 14 can output.
For example, when the number of bits at the time of operating the instantaneous phase θ(n) is set to 40 bits, provided that 2π(fc/fs) is expressed by 16 bits in a linear phase component included in the instantaneous phase Θ(n)L(n)=2π(fc/fs)n+θc, n is limited to a range which the remaining 24 bits can take.
In this case, given that a sampling frequency fs is 100 MHz, because the maximum measurement time for jitter measurement is limited to about 0.167 seconds which is (the maximum value of n)/fs, it is impossible to carry out jitter measurement for a time longer than it (for example, 10 seconds or more).
As described in the above-described Patent-document 2, this is originally derived from a technique which has been developed in order for the digital system jitter measuring apparatus 10 described above to clear a test time of about 0.1 seconds allocated per test item in a test of a very large scale integration (VLSI).
That is, the reason for that the maximum measurement time for jitter measurement is limited to about 0.167 seconds in the digital system jitter measuring apparatus 10 described above depends on that jitter measurement over a long time (for example, 10 seconds or more) is not supposed in this jitter measuring apparatus 10.
However, in jitter measurement in a communication equipment used for a digital system and a network, and the like, as described in the above-described non-Patent document 1, for example, a measurement time for verifying the level of jitter in an interface of a transmission path is prescribed to 60 seconds.
Given that the above-described n is expressed by 33 bits, measurement for 60 seconds due to this prescription is possible. However, in accordance therewith, because needs 49 bits as a result of adding 16 bits expressing the above-described 2π(fc/fs) are necessary as the number of bits of θ(n), there is a problem in the point that a hardware amount of an apparatus executing operations is made larger than the case of 40 bits described above.
Then, given that 2π(fc/fs) is expressed by 7 bits, and n is expressed by 33 bits, because 40 bits is sufficient as the number of bits of θ(n), jitter measurement for 60 seconds is possible as the hardware amount is the same as in the case of 40 bits.
However, in this case, there is a problem in the point that a phase accuracy (phase resolution) of a measured value deteriorates by an amount of 9 bits more than the above-described case of 49 bits.
Note that, in some cases, it is requested to carry out jitter measurement for a long time over several minutes or more, and moreover, one day or more.
Note that, in the case of the digital system jitter measuring apparatus 10 described above as well, a time for jitter measurement can be extended by reducing the resolution of the instantaneous phase θ(n). However, because there is a limit in that, and the measurement resolution is reduced, there is a problem in the point that a high resolution and a long time measurement cannot be compatible.